To validate that the FPGA board hardware it was necessary to write some
test code to benchmark the performance of the board compared to the original.
What is does
The code runs a series of tests on the berzerk hardware accessing
memory and counting
the number of op-codes which can be executed in a given 1/2 video
Actual values are not as significant as the results are only used for comparison
to the FPGA based hardware.
Using the internal 1/2 frame interrupts as a fixed time references
and the Z80's R register as the counter (R is incremented after each
op-code ), the number of instructions executed during each frame are
recorded. The R register is only 7 bits in length so ends up
overflowing and restarting at zero.
The second part of the test is a count of instructions executing
between each NMI ( non maskable
interrupt ), this happens every 32 video lines.
The z80 must execute the
same number of instructions between the interrupt intervals, also
the interval of the interrupt must happen at
precisely the same time for each iteration of the test loop.
To be an accurate hardware reproduction of the original hardware
no variation in results is possible.
Both the original and FPGA board posted the same numbers in each set
Don't take my word for it the source and the binaries are available
and anyone can modify, edit, adjust, eat and/or run their own code to
check for themselves.
So... at this point I'm calling the FPGA board demonstratably
In addition while running the tests 1,000,000 opcodes were captured
and compared to the a capture made on the original hardware, no
variance was recorded there either.
Notes on the hardware
Each area of memory ROM, non-volatile SRAM, video DRAM, color
SRAM has a different access characteristic from the z80's
Because the system is busy generating the display if the z80
attempts to access video DRAM memory a "wait" condition
will be added to pause the z80. The same is true for the color
memory (BSC), the z80 will have to wait for the video hardware
to finish accessing it.
The wait conditions are different between these two video &
color memory areas so this will result in different timing figures.
The system ROM area and non-volatile SRAM are both only accessed by
the z80, so they have no wait penalty and can run at full speed.
It's also worth mentioning that the interval between the two 1/2
frame interrupts aren't exactly the same length, one is slightly
longer than the other.
That same is true of the NMI interrupts, there are 8 interrupts in a
single frame and the first and last have a slighltly different
interval to the other six.
The two screen grabs were made with an s-video encoder and an older
PCI capture card.